FIG. 1 illustrates a cross-sectional view of a prior art N-channel junction field effect transistor (JFET) 100. The JFET is a vertical device and it comprises an N+ drain region 101 (generally as a semiconductor substrate), an N− epitaxial layer 102 located on the N+ drain region 101, a P body region 103 located in the N− epitaxial layer 102, an N+ source region 104 located in the N− epitaxial layer 102 and surrounded by the P body region 103, and a P+ gate region 105 located in the P body region 103. The JFET further comprises an interlayer dielectric layer (ILDL) 106, a source contact 107 and a gate contact 108. The source contact 107 extends through the ILDL 106 and provides electrical connection with the N+ source region 104. The gate contact 108 extends though the ILDL 106 and provides electrical connection with the P+ gate region 105. The N+ source region 104 is located in a part of the N− epitaxial layer 102 which is surrounded by the P body region 103. The part of the N− epitaxial layer 102 extends from the N+ source region 104 towards the N+ drain region 101, so as to form a conductive path.
When a bias voltage is applied to the gate contact 108, the P body region 103 will produce a pinch-off effect, so the current flowing through the conductive path can be controlled. As shown in FIG. 1, a label “A” is used to illustrate the pinch-off region generated in the N− epitaxial layer 102. Generally, in order to enhance the pinch-off effect, the width of the pinch-off region A should be set as small as possible and therefore a desired low pinch-off voltage can be achieved. However, this reduces the width of the conductive path, while increases the on-resistance. In addition, this also reduces the distance between the source region 104 and the gate region 105 and results in a low gate-source breakdown voltage. Besides, an optical lithography with higher resolution may be needed and the fabrication process may become more complicated.
Thus, it would be desired to reduce the pinch-off voltage while keeping the source region 104 far away from the gate region 105.